High Throughput Implementation of the Keccak Hash Function Using the Nios-II Processor

Multimedia Decoder Using the Nios II Processor

Design Introduction Our design target was to build a low-cost, high-performance H.264 decoder with a prototype H.264 decoder created using multiple small FPGAs. H.264 is a computationally complex, advanced video standard for achieving high compression ratios. To cater to the needs of high throughput applications such as HDTV, which requires 216,000 macroblocks/second of throughput, designers us...

GPU Implementation of the Keccak Hash Function Family

Hash functions are one of the most important cryptographic primitives. Some of the currently employed hash functions like SHA-1 or MD5 are considered broken today. Therefore, in 2007 the US National Institute of Standards and Technology announced a competition for a new family of hash functions. Keccak is one of the five final candidates to be chosen as SHA-3 hash function standard. In this pap...

Implementation of the Keccak Hash Function in FPGA Devices

Implementation setup The Keccak hardware reference designs consists of two rather different implementations. the high_speed_core design is, as the name suggest, a self contained high performance design. The low_area_copro on the other hand, is a small design where the state memory is external from the rest of the design. This allows the Keccak coprocessor to share memory with other design entit...

Nios II Processor Reference Handbook

Design and Implementation of Rijindael‟s Encryption and Decryption Algorithm using NIOS- II Processor

One of the foremost vital problems in communication customary is that the secure transport protocols. This paper can offer a doable resolution for Rijindael’s encryption and decoding algorithmic program using NIOS II processor, provided by ALTERA to be enforced in FPGA. We are going to see the performance of Rijindael’s AES using NIOS II/e (economic), NIOS II/s (standard) and NIOS II/f (fast). ...